Systems and methods for compression of high-frequency signals

ABSTRACT

Systems and methods for compressing high-frequency signals are described in certain embodiments herein. According to certain embodiments, a high-frequency signal can be converted into a lower frequency signal so that it can be processed by one or more devices in a lower frequency infrastructure. In certain embodiments, the high-frequency signal can be compressed by certain signal conditioning components and an algorithm executed by a computer processor to at least receive a high-frequency signal, correct the high-frequency signal, determine a number of samples to be taken from the high-frequency signal (i.e., sample the high-frequency signal), store a value associated with the sampled signal, and generate a waveform that includes lower frequency content that may represent the original, high-frequency signal.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a Continuation-in-Part (CIP) of U.S. patent application Ser. No. 13/409,930, entitled “SYSTEMS AND METHODS FOR COMPRESSION OF HIGH-FREQUENCY SIGNALS,” filed Mar. 1, 2012, which is incorporated herein by reference in its entirety.

TECHNICAL FIELD

Embodiments herein relate generally to signal processing and more particularly to compressing content in high-frequency signals.

BACKGROUND OF THE INVENTION

Various measurement systems and equipment can capture content from high-frequency signals. Processing such signals, however, can require a dedicated and specialized infrastructure including special wiring, high-speed data acquisition devices, and large storage devices. Such an infrastructure can be costly to build and maintain each time high-frequency signals require processing. More conventional infrastructures that may be unable to process high-frequency signals have not been fully leveraged to provide a more diverse, cost-effective alternative.

BRIEF DESCRIPTION OF THE INVENTION

Some or all of the above needs and/or problems may be addressed by certain embodiments of the invention. Certain embodiments may include systems, methods, and apparatuses for compressing high-frequency signals. According to one embodiment, there is disclosed an apparatus including: a summing junction configured to receive at least one compressed signal created in part by compressing at least one measured signal; a modulator coupled to the summing junction and configured to modulate the at least one compressed signal; a filter coupled to the modulator and configured to filter the at least one measured signal; at least one memory coupled to the modulator and configured to store the at least one compressed signal; and a maximum detect and hold control interface coupled to at least one of the summing junction, the modulator, the filter, and the at least one memory, the maximum detect and hold control interface configured to: control at least one of the summing junction, the modulator, the filter, and the at least one memory to compress the at least one measured signal; and divide the at least one compressed signal into at least two divisions based at least in part on a determined number of samples to be collected from a corrected signal.

According to another embodiment, there is disclosed a system including at least one memory configured to store computer-executable instructions, and at least one processor configured to access the at least one memory, the at least one processor further configured to execute the computer-executable instructions to receive a signal, correct the signal, determine a number of samples to be collected from the corrected signal, divide the corrected signal into a plurality of packets, store a maximum value of the corrected signal for each packet of the plurality of packets, and generate a waveform based at least in part on the maximum value stored for each packet of the plurality of packets.

According to a further embodiment, there is disclosed a method for: receiving, from a monitored machine, a high-frequency signal having a frequency of at least approximately 100 kHz; correcting the high-frequency signal by recording only a predefined portion of the high-frequency signal; determining a number of samples to be collected from the corrected high-frequency signal; dividing the high-frequency signal into a plurality of packets based at least in part on the number of samples; storing a maximum value of the corrected high-frequency signal for each packet of the plurality of packets; and generating a waveform based at least in part on the maximum value stored for each packet of the plurality of packets.

Other embodiments, systems, methods, apparatuses, aspects, and features of the invention will become apparent to those skilled in the art from the following detailed description, the accompanying drawings, and the appended claims.

BRIEF DESCRIPTION OF THE FIGURES

The detailed description is set forth with reference to the accompanying drawings, which are not necessarily drawn to scale. The use of the same reference numbers in different figures indicates similar or identical items.

FIG. 1 is a block diagram of an apparatus including, but not limited to, signal conditioning components for compressing high-frequency signals, according to one embodiment.

FIG. 2A is a graphical illustration of a high-frequency signal that is sampled according to certain embodiments herein.

FIG. 2B is a graphical illustration of an exemplary waveform that may result from compressing a high-frequency signal, according to one embodiment.

FIG. 3 is a block diagram of an exemplary computing environment for compressing high-frequency signals, according to one embodiment.

FIG. 4 is a flow diagram illustrating details of a method for compressing high-frequency signals, according to one embodiment.

FIG. 5 is a block diagram of an apparatus including, but not limited to, signal conditioning components for compressing high-frequency signals, according to another embodiment.

DETAILED DESCRIPTION OF THE INVENTION

Illustrative embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all embodiments of the invention are shown. The invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements.

Illustrative embodiments of the invention are directed to, among other things, compression of high-frequency signals. As used herein, a signal may be considered a high-frequency signal if it is greater than or equal to about 100 kilohertz (kHz). Compressing a high-frequency signal can refer generally to converting the high-frequency signal to a lower frequency signal, i.e., a signal lower than about 100 kHz. Certain embodiments herein are directed to compressing high-frequency signals into lower frequency signals so that they can be used by infrastructures that can process lower frequency signals but not high-frequency signals, i.e., lower frequency infrastructures as used herein. For example, certain input/output (IO) devices, such as monitors and wires connecting such devices to various high-frequency systems, may be unable to receive and process high-frequency signals in their original form.

Compression of high-frequency signals can be performed using various systems and components in certain embodiments herein. As an overview, a computer system executing computer-instructions may compress a high-frequency signal. The computer system can receive a high-frequency signal, such as an ultrasonic wave, and correct the signal for further processing. For example, the high-frequency signal can be amplified to increase the resolution of the high-frequency signal. The computer system may also filter the high-frequency signal to keep data for certain frequencies. The signal can be further rectified so that peak levels along the sinusoidal waveform representing the high-frequency signal can be captured, according to one embodiment.

In one embodiment, after the high-frequency signal has been corrected, the computer system can determine a rate at which to sample the high-frequency signal. A maximum value for each sample taken can be stored and used to create an amplitude modulated waveform that may represent the original high-frequency signal as a lower frequency signal. The generated waveform can be sent over a field wire to an IO device, both in a lower frequency infrastructure, where it can be processed or analyzed. Prior to compressing the high-frequency signal as described above, the field wire and IO device would have been unable to handle the high-frequency signal, according to certain embodiments. The computer system can also combine multiple, compressed high-frequency signals into a single lower frequency signal and send the combined signal to a lower frequency infrastructure. Certain embodiments herein also describe an apparatus that can also implement the compression of high-frequency signals described above.

The technical effect of certain embodiments herein may be reduced costs associated with processing high-frequency signals in the way that relatively expensive infrastructures used to process such signals may not be necessary for all situations in which high-frequency signals need to be processed.

FIG. 1 depicts an apparatus that can be used to compress a high-frequency signal, according to one embodiment. The apparatus 100 can include, but is not limited to, a signal conditioner 104, and an IO module 120. In one embodiment, the apparatus can be an analog-to-digital (AD) converter. The signal conditioner 104 can receive high-frequency signals from one or more sensors 102. The one or more sensors 102 can be associated with conditioning monitoring systems on rotating and reciprocating equipment, or other measurement systems equipment, as non-limiting examples. High-frequency signals can also be received from various other types of equipment that may generate high-frequency signals. In one embodiment, the apparatus can include, but is not limited to, components that may correct a high-frequency signal, process the corrected signal, and output a waveform in a lower frequency that may be representative of the original, high-frequency signal.

The signal conditioner 104 can include, but is not limited to, a maximum detect and hold control interface 112. In one embodiment, the maximum detect and hold control interface 112 can be coupled to one or more of a switch, a modulator, a filter, and at least one memory. Such an interface can control each of these components to compress one or more signals, such as signals received from measurement equipment, i.e., measured signals. In one aspect of an embodiment, the measured signal can be a high-frequency signal of at least about 100 kHz.

One or more pre-amplifiers 106, filters 108, and signal rectifiers 110 can be used to correct the measured signal, in one embodiment. According to this embodiment, the pre-amps 106 can amplify the measured signal to increase the resolution of the measured signal by, for example, increasing the signal-to-noise ratio. A filter 108 can be coupled to the modulator and configured to filter out invalid or unwanted data points from the measured signal. Exemplary filters can include, but are not limited to, a bandpass filter and a decimation bandwidth filter. The signal rectifier 110 can be configured to correct the measured signal by recording only a predefined portion of the signal, in one embodiment. In one aspect of the embodiment, the predefined portion of the measured signal can be a positive portion of the signal. The signal rectifier 110 can record other portions of a signal to correct the signal or otherwise prepare the measured signal for compression, in other embodiments.

In certain embodiments, the maximum detect and hold control interface 112 can implement a computer algorithm to compress a measured signal, such as a corrected high-frequency signal. In one embodiment, the computer algorithm can be implemented by a digital signal processor (DSP), which can receive computer-executable instructions for performing the compression in its firmware. The maximum detect and hold control interface 112 can determine a rate for acquiring digital samples from the corrected signal. A primary factor in such a determination can be the frequency at which a signal is desired to be modulated. The modulated frequency can depend on the infrastructure or equipment that may receive and process the modulated signal. For example, to process a signal modulated at about 20 kHz that may be representative of an original, high-frequency approximate 454 kHz signal, about twenty-three samples would need to be taken. The number of samples can be determined by dividing the original, high-frequency signal (about 454 kHz) by the desired frequency of the modulated signal (about 20 Hz).

Upon determining the number of samples to acquire, according to one embodiment, the maximum detect and hold control interface 112 can acquire the samples. The lighter-shaded portion of the exemplary signal in FIG. 2A represents the acquired samples, according to one example. In one embodiment, the lighter-shaded portion can have a length equal to the inverse of the sampling frequency, e.g., 20 kHz, times the number of samples, e.g., twenty-three. The maximum detect and hold control interface 112 can also store the acquired samples in a memory 124, which can be coupled to the modulator and configured to store the compressed signal. In one aspect of an embodiment, the maximum value of the acquired digital samples can be stored. In another aspect, the maximum value of the corrected signal for each of a plurality of packets can be stored.

The compressed signal, for example the compressed signal shown in FIG. 2B, can be further processed to make it suitable for receipt by a lower frequency infrastructure. Such an infrastructure may, in certain embodiments, require an analog signal. In one embodiment, the maximum detect and hold control interface 112 can “fill-in” the area underneath the compressed signal such that the compressed signal can include an amplitude modulated sinusoidal waveform, in one aspect of an embodiment. Such a waveform can be generated by the maximum detect and hold control interface 112 performing certain calculations on data from the compressed signal. The calculations can include, but are not limited to, determining a modulation for the waveform based on the sampling frequency. An exemplary waveform that can result from the calculations is shown in FIG. 2B. Such a waveform may be without high-frequency content and therefore can be used in certain lower frequency infrastructures.

In one embodiment, the algorithm implemented by the control interface 112 may be implemented in Microsoft® Visual Basic® for Applications (VBA), and the data may be stored in a format compatible with VBA, such as data exported from Microsoft® Excel® in Comma Separated Values (CSV) format. In other embodiments, various other programming languages and data formats can be used to implement the algorithm.

In one embodiment, the maximum detect and hold control interface 112 can also be configured to divide the compressed signal into at least two divisions that can be based at least in part on the determined number of samples collected from the corrected signal. In one aspect of an embodiment, an amount of the plurality of packets may be based at least in part on the at least two divisions. The maximum detect and hold control interface 112 can be further configured to store the generated waveform in memory 124 or output the generated waveform. For example, the generated waveform may be passed through a field wire to an IO module 120 in a lower frequency infrastructure by a modulator 114, which can be coupled to the switch and configured to modulate the compressed signal, e.g., in its sinusoidal wave form. The switch 116 can be configured to receive at least one compressed signal, which, according to one embodiment, can be created by compressing one or more measured signals. In certain embodiments, the switch 116 can be a multiple-input, single output switch, such as a multiplexing switch, which can combine compressed signals into a single signal before it is transmitted to an IO module 120 in a lower frequency infrastructure by the modulator 114. The filters 122 in the IO module 120 may be required to separate the combined signal at the IO module 120 before it can be processed, in some embodiments.

In certain embodiments, the process of compressing a high-frequency signal may introduce a timing error which reflects a lag between the compressed signal and the measured, high-frequency signal. In the above example, a timing error of about 6.3×10⁻⁵ seconds may be introduced ((23 samples*1.25)/454 kHz, where 1.25 is a factor and 454 kHz is the approximate frequency of the high-frequency signal. According to certain embodiments, such an error or less can be acceptable.

FIG. 3 depicts a block diagram of an exemplary computing environment for compressing a high-frequency signal. The computing environment 300 can include a computing device, which can include a processor 304 capable of communicating with a memory 302. The processor 304 can be implemented as appropriate in hardware, software, firmware, or combinations thereof. Software or firmware implementations of the processor 304 may include computer-executable or machine-executable instructions written in any suitable programming language to perform the various functions described. Examples of computing devices may include a personal computer, mainframe, web server, mobile device, or any processor-based device capable of executing instructions to perform the functions described in embodiments herein.

A memory 302 can store program instructions that are loadable and executable on the processor 304, as well as data generated during the execution of these programs. Depending on the configuration and type of computing environment 300, a memory 302 may be volatile (such as random access memory (RAM)) and/or non-volatile (such as read-only memory (ROM), flash memory, etc.). The computer device may also include additional removable storage 306 and/or non-removable storage 308 including, but not limited to, magnetic storage, optical disks, and/or tape storage. The disk drives and their associated computer-readable media may provide non-volatile storage of computer-readable instructions, data structures, program modules, and other data for the computing devices. In some implementations, the memory 302 may include multiple different types of memory, such as static random access memory (SRAM), dynamic random access memory (DRAM), or ROM.

The memory 302, removable storage 306, and non-removable storage 308 are all examples of computer-readable storage media. For example, computer-readable storage media may include volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer-readable instructions, data structures, program modules or other data. Additional types of computer storage media that may be present include, but are not limited to, programmable random access memory (PRAM), SRAM, DRAM, RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile discs (DVD) or other optical storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by the computer device. Combinations of any of the above should also be included within the scope of computer-readable media.

In other embodiments, however, computer-readable communication media may include computer-readable instructions, program modules, or other data transmitted within a data signal, such as a carrier wave, or other transmission. As used herein, however, computer-readable storage media does not include computer-readable communication media.

The computing environment 300 may also include one or more communication connections 310. In one embodiment, the connections 310 can allow the computer device to receive data from one or more sensors that receive content in high-frequency signals. The connection between the computer device and equipment may be wired or wireless, according to various embodiments. The computing environment 300 can also include one or more input devices 312, such as a keyboard, mouse, pen, voice input device, and touch input device. It may also include one or more output devices 314, such as a display, printer, and speakers.

Turning to the contents of the memory 302 in more detail, the memory 302 can include, but is not limited to, an operating system 316 and one or more application programs or services for implementing the features and aspects disclosed herein, including a signal receiving module 318, a signal correction module 320, a sample size determination module 322, a maximum value storing module 324, and a wave generation module 326.

The signal receiving module 318 can receive a signal, such as a high-frequency signal of at least about 100 kHz, in one aspect of an embodiment. The signal can be corrected by the signal correction module 320. Correction of the signal can include amplifying the signal to increase the resolution of the signal. The amplification can be similar to that performed by the pre-amps 106 in FIG. 1 described above. Correction of a signal can also include filtering the signal to remove invalid or unwanted data points. The filtering can be similar to that performed by the filter 108, according to one embodiment. Correction of the high-frequency signal can further include recording only a predefined portion of the signal, in similar fashion to that performed by the signal rectifier 110 in one embodiment. In one aspect of the embodiment, the predefined portion of the signal can be the positive portion of the signal.

Upon correcting the signal, the sample size determination module 322 can determine a number of samples to be collected from the corrected signal. In one embodiment, the number of samples can be determined based on a desired frequency at which to modulate the signal. In one embodiment, the sample size determination module 322 can also divide the signal into at least two divisions that can be based at least in part on the determined number of samples that may be collected from the corrected signal.

The maximum value storing module 324 can store the corrected signal in a memory, for example. According to various embodiments, different representations of the signal can be stored. In one embodiment, the maximum value of the corrected signal for a plurality of packets can be stored. An amount of the plurality of packets can be based on the at least two divisions of the signal, in one aspect of an embodiment. The maximum value for the plurality of packets can be used to generate a waveform, e.g., an amplitude modulated sinusoidal waveform generated by the waveform generation module 326. The waveform generation module 326 can also store and/or output the generated waveform, in one aspect of an embodiment.

While the embodiment in FIG. 3 describes a computer device with a memory 302 including various modules, one will recognize that certain functionality associated with the computer device can be distributed to any number and combination of computer or processor-based devices in accordance with other embodiments. Various instructions, methods, and techniques described herein may be considered in the general context of computer-executable instructions, such as program modules, executed by one or more computers or other devices. Generally, program modules include routines, programs, objects, components, data structures, etc., for performing particular tasks or implementing particular abstract data types. These program modules and the like may be executed as native code or may be downloaded and executed, such as in a virtual machine or other just-in-time compilation execution environments. Typically, the functionality of the program modules may be combined or distributed as desired in various embodiments. An implementation of these modules and techniques may be stored on some form of computer-readable storage media.

FIG. 4 is an exemplary flow diagram illustrating details of a method for compressing a high-frequency signal. In one example, a computing device can perform any, some, or all of the operations of process 400. The process 400 is illustrated as a logical flow diagram, in which each operation represents a sequence of operations that can be implemented in hardware, software, or a combination thereof. In the context of software, the operations can represent computer-executable instructions stored on one or more computer-readable storage media that, when executed by one or more processors, perform the recited operations. Generally, computer-executable instructions can include routines, programs, objects, components, data structures, and the like that perform particular functions or implement particular abstract data types. The order in which the operations are described is not intended to be construed as a limitation, and any number of the described operations can be combined in any order and/or in parallel to implement the process.

In this particular implementation, the process 400 can begin at block 402, where a high-frequency signal can be received. In one embodiment, the high-frequency signal can be received from one or more sensors 102 by a signal conditioner 104, as shown in FIG. 1. A high-frequency signal can also be received by the signal receiving module 318 in FIG. 3. The high-frequency signal can be corrected by recording only a predefined portion of the high-frequency signal, such as the positive portion of the signal as noted above, at block 404. Such correction can be performed by one or more of the pre-amps 106, the filters 108, or the signal rectifiers 110, as illustrated and described in association with FIG. 1. The correction can also be performed by the signal correction module 320 illustrated in FIG. 3, in one embodiment.

A sample size for collecting a number of samples from the high-frequency signal, e.g., the corrected high-frequency signal, can be determined at block 406. The signal can also be divided into packets at block 408, and the maximum value of each of the packets can be stored at block 410. In one embodiment, the sample size determination, division of the signal into packets, and storing of the maximum value of the packets can be performed by the maximum detect and hold control interface 112, as illustrated and described in association with FIG. 1. In another embodiment, each of these processes can also be performed by the sample size determination module 322, as illustrated and described in association with FIG. 3.

A waveform can be generated at block 412. The waveform can be a lower frequency representation of the original, high-frequency signal without the high-frequency content. The generated waveform can be stored at block 414 and output at block 416. In one embodiment, the waveform can be generated, stored, and output by the maximum detect and hold control interface 112 as illustrated and described in association with FIG. 1. In another embodiment, each of these processes can be performed by the wave generation module 326, as illustrated and described in association with FIG. 3.

FIG. 5 illustrates an alternative embodiment of apparatus 500 that can be used to compress a high-frequency signal. Apparatus 500 is similar to apparatus 100 (shown in FIG. 1), except as otherwise described herein. More specifically, in apparatus 500, maximum detect and hold control interface 112 is coupled to a summing junction 516, rather than to switch 116 (shown in FIG. 1). Similar to the embodiment illustrated in FIG. 1, the embodiment shown in FIG. 5 also may be at least partially implemented in the computing environment 300 illustrated in FIG. 3, for example, and may be used in the course of performing at least some of operations of the process 400 illustrated in FIG. 4, for example.

With reference to FIGS. 2A, 2B, 3, 4, and 5, the generated waveform may be transmitted through a field wire to IO module 120 in a lower frequency infrastructure via modulator 114, which can be coupled to summing junction 516 and which may be configured to modulate the compressed signal, e.g., in its sinusoidal wave form. Summing junction 516 may be configured to receive at least one compressed signal, which, according to one embodiment, can be created by compressing one or more measured signals. In certain embodiments, summing junction 516 can be a multiple-input, single output switch, such as a multiplexing switch, that can combine compressed signals into a single signal before it is transmitted to IO module 120 in a lower frequency infrastructure by modulator 114. Filters 122 in IO module 120 again may be required to separate the combined signal at the IO module 120 before it can be processed, in some embodiments. Again, in certain embodiments, the process of compressing a high-frequency signal may introduce a timing error which reflects a lag between the compressed signal and the measured, high-frequency signal. In the above example, a timing error of about 6.3×10⁻⁵ seconds may be introduced ((23 samples*1.25)/454 kHz), where 1.25 is a factor and 454 kHz is the approximate frequency of the high-frequency signal. According to certain embodiments, such an error or less can be acceptable.

Summing junction 516 also receives and adds at least two compressed signals generated as described above with reference to FIGS. 1 and 5. Summing junction 516 thus sums at least two separate compressed signals received from at least two separate branches of signal conditioner 104. Further, summing junction 516 may be implemented as either an analog component (e.g., an operational amplifier), a digital component (e.g., a DSP and/or a microcontroller), or combinations thereof. Depending on particular applications of summing junction 516 in apparatus 500, tuning and calibration functionality may be incorporated into apparatus 500 to a considerably greater extent as compared with apparatus 100 with switch 116. Therefore, summing junction 516 imparts a higher level of functionality and flexibility of applications of apparatus 500 than switch 116 does in apparatus 100, and thus enhances the performance characteristics of apparatus 500 over apparatus 100.

Illustrative systems and methods for the compression of high-frequency signals are described above. Some or all of these systems and methods may, but need not, be implemented at least partially by configurations such as those shown in FIGS. 1, 3, and 5. It should be understood that certain acts in the methods may be rearranged, modified, and/or omitted entirely, depending on the circumstances. Also, any of the acts described above with respect to any method may be implemented by any number of processors or other computing devices based on instructions stored on one or more computer-readable storage media. 

What is claimed is:
 1. An apparatus comprising: a summing junction configured to receive at least one compressed signal created in part by compressing at least one measured signal; a modulator coupled to said summing junction and configured to modulate the at least one compressed signal; a filter coupled to said modulator and configured to filter the at least one measured signal; at least one memory coupled to said modulator and configured to store the at least one compressed signal; and a maximum detect and hold control interface coupled to at least one of said summing junction, said modulator, said filter, and said at least one memory, said maximum detect and hold control interface configured to: control at least one of said summing junction, said modulator, said filter, and said at least one memory to compress the at least one measured signal; and divide the at least one compressed signal into at least two divisions based at least in part on a determined number of samples to be collected from a corrected signal.
 2. The apparatus of claim 1, wherein said maximum detect and hold control interface is further configured to compress and divide the at least one measured signal having a frequency of at least approximately 100 kHz.
 3. The apparatus of claim 1 further comprising a signal rectifier configured to correct the at least one measured signal by recording only a predefined portion of the at least one measured signal.
 4. The apparatus of claim 3, wherein the predefined portion of the at least one measured signal is a positive portion of the at least one measured signal.
 5. The apparatus of claim 1, wherein said maximum detect and hold control interface is further configured to divide the at least one compressed signal into a plurality of packets, wherein an amount of the plurality of packets is based at least in part on the at least two divisions.
 6. The apparatus of claim 1, wherein said summing junction is further configured to receive the at least one compressed signal as an amplitude modulated sinusoidal waveform.
 7. The apparatus of claim 1, wherein said maximum detect and hold control interface is further configured to at least one of store and output a waveform representing the at least one compressed signal.
 8. The apparatus of claim 1, wherein said filter comprises a bandpass filter.
 9. The apparatus of claim 1, wherein said filter comprises a decimation bandwidth filter.
 10. The apparatus of claim 1, wherein said summing junction comprises a switch.
 11. The apparatus of claim 1, wherein said summing junction comprises a multiplexing switch.
 12. The apparatus of claim 1 further comprising a pre-amplifier coupled to at least one of a sensor, said summing junction, said modulator, said filter, and said at least one memory, said pre-amplifier configured to amplify the at least one measured signal to increase a resolution thereof.
 13. The apparatus of claim 1, wherein said maximum detect and hold control interface comprises a digital signal processor (DSP) comprising firmware, said DSP configured to receive computer-executable instructions to implement a computer algorithm for compressing the at least one measured signal.
 14. The apparatus of claim 1 further comprising an input/output (TO) module comprising at least one of an analog-to-digital converter and an additional filter, and coupled to at least one of said modulator and said summing junction, said TO module configured to further modulate the at least one compressed signal, said modulator further configured to transmit the at least one compressed signal to said TO module in a lower frequency infrastructure than an original high frequency signal.
 15. A system comprising: at least one memory configured to store computer-executable instructions; and at least one processor configured to access said at least one memory, said at least one processor further configured to execute the computer-readable instructions to: receive a signal; correct the signal; determine a number of samples to be collected from the corrected signal; divide the corrected signal into a plurality of packets; store a maximum value of the corrected signal for each packet of the plurality of packets; and generate a waveform based at least in part on the maximum value stored for each packet of the plurality of packets.
 16. The system of claim 15, wherein said at least one processor is further configured to receive a signal having a frequency of at least approximately 100 kHz.
 17. The system of claim 15, wherein said at least one processor is further configured to execute the computer-executable instructions to correct the signal by recording only a predefined portion of the signal.
 18. A method comprising: receiving, from a monitored machine, a high-frequency signal having a frequency of at least approximately 100 kHz; correcting the high-frequency signal by recording only a predefined portion of the high-frequency signal; determining a number of samples to be collected from the corrected high-frequency signal; dividing the high-frequency signal into a plurality of packets based at least in part on the number of samples; storing a maximum value of the corrected high-frequency signal for each packet of the plurality of packets; and generating a waveform based at least in part on the maximum value stored for each packet of the plurality of packets.
 19. The method of claim 18, wherein correcting the high-frequency signal by recording only a predefined portion of the high-frequency signal comprises recording a positive portion of the high-frequency signal.
 20. The method of claim 18, wherein generating a waveform based at least in part on the maximum value stored for each packet of the plurality of packets comprises generating an amplitude modulated sinusoidal waveform. 